Blog: www.arvinhwo.com
Email: root@arvinhwo.com
Summary
Digital Front-End Engineer with hands-on experience in ASIC / SoC verification and FPGA prototyping.
Experienced across the chip development flow from functional verification to production test support.
Key areas of expertise:
- SystemVerilog / Verilog testbench development
- RISC-V instruction verification
- Cryptographic module verification (SHA-256, ECDSA)
- FPGA-based SoC prototyping
- CP test vector generation and ATE support
Experience
Education
- Xidian University
- B.S. in Microelectronics Science and Engineering
- Sep 2019 – Jun 2023
Digital Front-End Engineer
Jun 2023 – Present
Key responsibilities:
Developed module-level and system-level verification environments using Verilog/SystemVerilog
Performed simulation, waveform analysis, and debugging using VCS and Verdi
Built FPGA-based SoC prototype platforms using Xilinx devices and Vivado
Developed internal FPGA tools for functional debugging and validation
Generated CP test vectors via TCL scripting and simulation waveform data
Collaborated with ATE engineers to debug production test patterns
Assisted silicon failure analysis using FPGA platforms
Projects
ASIC Project
Role: Verification / FPGA Prototyping / CP Test Support
Result: Successful tape-out
- Verified ASIC modules and system functionality
- Built FPGA prototype environment for functional validation
- Generated CP test vectors using TCL scripts and waveform data
- Collaborated with test engineers on ATE debugging
- Assisted silicon failure analysis using FPGA platforms
SoC Chip Project
Role: SoC Verification / RISC-V / Crypto Modules
Result: Successful tape-out
- Contributed to system-level SoC functional verification
- Verified custom RISC-V instruction extensions
- Implemented DPI-based verification for SHA-256 and ECDSA modules
- Performed simulation debugging using VCS and Verdi
- Supported post-silicon testing and validation
Skills
Digital Design & Verification
- Verilog / SystemVerilog
- Functional Verification
- Testbench Development
- SoC Verification
Processor & Security
- RISC-V Instruction Verification
- SHA-256
- ECDSA
FPGA Prototyping
- Xilinx FPGA
- Vivado
- SoC Prototype Platforms
- Hardware Debug
EDA Tools
- VCS
- Verdi
- Vivado
- Design Compiler
Silicon Test & Production Support
- CP Test Vector Generation
- TCL-based ATE Vector Creation
- Production Test Support
- Lab Testing and Debug